M31 Technology (Stock code: 6643), a global IP provider, recently announced that the PCI Express (PCIe) 5.0 specification IP for the 12nm process has been validated and is ready for mass production. At the same time, in-house development of 7nm PCIe IP with additional support for Compute Express Link (CXL) is underway, providing new applications for processor interconnects, wide-range Ethernet protocols, and memory expanders.

With the rapid growth of AI, IoT, and 5G, more connected devices are being created, and more diverse applications are being developed. However, the consequent proliferation of data and computing issues has led to a significant increase in data throughput, putting tremendous pressure on all aspects of the computing architecture. In order to meet the demands for enormous interconnection and data transfer, the assistance of a higher speed interface is needed; therefore, PCIe 5.0, a high-speed bus with high bandwidth, plays a crucial role in the future development of cloud computing and AI.

As a leader in high-speed interface IP transport, M31’s PCIe 5.0 PHY IP provides high performance, multi-channel capability, and low power architecture for high-bandwidth applications, supporting the full range of PCIe 5.0 base applications, and complying with PIPE 5.2 specifications. The IP integrates a high-speed mixed-signal circuit that provides optimal power at both the maximum data rate of 32Gbps and worst-case Insertion Loss to dramatically accelerate transmission rates and maintain system stability. PCIe 5.0 is fully compatible with previous generations of PCIe architectures and is designed for high-capacity transport interfaces. By supporting root complex and bifurcation modes, and with the unique module design of M31, it can synthesize up to a 512Gbps IP, providing higher speed bandwidth and meeting the requirement of different channel conditions.

Scott Chang, CEO of M31, said: “M31 works closely with customers from IP design, measurement to system compatibility testing, allowing us to provide optimal solutions for customers’ product applications. Compared to previous generations, the new version of the PCIe 5.0 specification has more than twice the bandwidth of the previous generation. At the same time, it is more optimized in terms of cost, power consumption, design complexity, and compatibility. As PCIe applications become more widespread, M31’s silicon-proven, high quality IP will help customers accelerate the development of new PCIe specification products. Recently, end-user has announced the next generation of products at 2022 CES and entered mass production, which is the best proof that M31 is playing a significant role in the implementation of the latest PCIe standard and is rapidly being adopted by customers.”